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Introduction to the PIC microcontroller family

Number 0x01: 03/23/2006

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Published in 
the bug magazine
 · 28 Dec 2022

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[ M . A . G . A . Z . I . N . E ]


[ Numero 0x01 <---> Edicao 0x01 <---> Artigo 0x08 ]



.> 05 de Marco de 2006,
.> The Bug! Magazine < staff [at] thebugmagazine [dot] org >

Introduction to the PIC microcontroller family

by Rafael Silva < rafaelsilva [at] rfdslabs [dot] com [dot] br >

1. Introduction

After reading this article you will be able to operate any microcontroller from MICROCHIP's PIC family. This text tries to explain basic PIC microcontroller functionality such as memory, architecture, instruction format, registers, etc... Let's Go...

It was in 1969 that a team of Japanese engineers from the BUSICOM company arrived in the United States with the goal to develop, according to design, some integrated circuits for calculators. The proposal was delivered to INTEL and Marcian Hoff was responsible for its realization. Since he had experience working with a PDP8 computer (PC), he decided to present a substantially different solution instead of the suggested construction. This solution assumed that the function of the integrated circuit would be determined by a program stored on it. This meant that the configuration should be simpler, but it also required much more memory than in the case of the design proposed by the Japanese engineers. After some time, although the Japanese engineers tried to find an easier solution, Marcian's idea won out and the first microprocessor was born. By turning this idea into a concrete product, Frederico Faggin was of great use to INTEL. He transferred to INTEL and in only 9 months succeeded in creating a real product from his first conception. In 1971, INTEL acquired the rights to sell this integral block. First they bought the license from the BUSICOM company, which had no idea of the treasure it possessed. In this same year a microprocessor designated 4004 appeared on the market. This was the first 4-bit microprocessor and had the speed of 6,000 operations per second. Not long after, the American company CTC asked INTEL and Texas Instruments for an 8-bit microprocessor for use in terminals. Even though CTC eventually gave up on this idea, both Intel and Texas Instruments continued to work on the microprocessor, and in April 1972 the first 8-bit microprocessors appeared on the market with the name 8008. It could address 16KB of memory, had 45 instructions and had the speed of 300,000 operations per second. This microprocessor was the pioneer of all current microprocessors. Intel continued product development and in April 1974 brought out an 8-bit processor called the 8080 with the ability to address 64KB of memory, with 75 instructions and prices starting at $360.

Another American company, Motorola, quickly realized what was happening and so put a new 8-bit microprocessor, the 6800, on the market. The chief builder was Chuck Peddle and besides the microprocessor itself, Motorola was the first company to make other peripherals like the 6820 and 6850. By this time many companies had realized the enormous importance of microprocessors and started to introduce their own developments. Chuck Peddle leaves Motorola to join MOS Technology and continues to work intensively on the development of microprocessors.

In 1975, at the WESCON exhibition in the United States, a critical event in the history of microprocessors occurred. MOS Technology announced that it was going to put 6501 and 6502 microprocessors on the market for $25 each, and that it could fill all orders immediately. This seemed so sensational that many thought it was some sort of con, considering that competitors were selling the 8080 and 6800 at $179 each. To respond to this competitor, both Intel and Motorola lowered their prices per microprocessor to $69.95 on the very first day of the show. Motorola quickly filed a lawsuit against MOS Technology and Chuck Peddle for copyright infringement for copying the 6800. MOS Technology stopped manufacturing the 6501, but continued with the 6502. The 6502 is an 8-bit microprocessor with 56 instructions and an addressing capacity of 64KB of memory. Due to its low cost, the 6502 becomes very popular and thus is installed in computers such as KIM-1, Apple I, Apple II, Atari, Commodore, Acorn, Oric, Galeb, Orao, Ultra and many others. Soon several manufacturers of the 6502 appear (Rockwell, Sznertek, GTE, NCR, Ricoh and Comodore acquired MOS Technology), which, at the height of its prosperity, sold 15 million microprocessors a year!

However, the others did not give up. Frederico Faggin leaves Intel and founds Zilog Inc.

In 1976, Zilog announces the Z80. While designing this microprocessor, Faggin makes a critical decision. Knowing that a huge amount of programs had already been developed for the 8080, Faggin concludes that many will remain loyal to this microprocessor because of the great expense that would be incurred by changes to all these programs. So he decides that the new microprocessor must be 8080-compatible, i.e. it must be able to run all programs that have already been written for the 8080. Besides these features, other additional features were introduced, so that the Z80 became a very powerful microprocessor in its time. It could directly address 64KB of memory, had 176 instructions, a large number of registers, an option for dynamic RAM refresh, a single power supply, higher operating speed, etc. The Z80 became a great success and everyone moved from the 8080 to the Z80.

It can be said that the Z80 was without a doubt the most successful 8-bit microprocessor of its time. Besides Zilog, other new manufacturers like Mostek, NEC, SHARP and SGS came along. The Z80 was the heart of many computers like the Spectrum, Partner, TRS703, Z-3 and Galaxy, that were used here.

In 1976, Intel came out with an improved version of the 8-bit microprocessor and called the 8085. However, the Z80 was so superior to this that Intel soon lost the battle. Although a few more microprocessors appeared on the market (6809, 2650, SC/MP etc.), everything was already decided. There were no more major improvements for the manufacturers to justify the switch to a new microprocessor, so the 6502 and the Z80, accompanied by the 6800, remained the most representative 8-bit microprocessors of that time. "Text taken from the book the PIC MICROCONTROLER".

2. Introduction to the PIC microcontroller family

A microcontroller is characterized by incorporating in the same package a microprocessor, program and data memory, and several peripherals such as timers, watchdog timers, serial communication, analog-to-digital converters, PWM generators, etc., making the final hardware extremely complex.

Microchip is a forerunner in the use of RISC (Reduced Instruction Set Computer) technology in microcontrollers. Unlike the Von Neumann architecture, the RISC structure is based on independent buses for data and for program, and has as a fundamental characteristic the different sizes (for example: in the PIC16C55X the data bus is 8 bits, while the program bus is 14 bits) which means that an instruction is "packed" in a single program word (in the case of the PIC16C55X 14 bits), that besides containing the opcode (instruction) contains the operands (data for instruction execution).

Figure 1: prive vs. relative performance
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Figure 1: prive vs. relative performance

Microchip offers four (4) families of 8-bit microcontrollers in the databus. These families are:

  • PIC12CXXX: Compact Line
  • PIC16C5X/PIC16C55X: Base line
  • PIC16CXX: Intermediate Line
  • PIC17CXX: Top of the Line

All families offer several program memory options: OTP (One Time Programmable) and EPROM (Erasable and Programmable Read Only Memory - used for development). In addition, they offer low-voltage options and various oscillator circuit types, as well as various low-voltage options and various oscillator circuit types, as well as various encapsulation options. Some components are available in ROM (masked) and EEPROM/FLASH (reprogrammable).

3. Microcontroller architecture

The high performance of the PIC microcontroller family can be attributed to the following RISC architecture features:

  • Versatile Register Map
  • All instructions in simple words
  • Long instruction word
  • Pipeline Instruction Architecture
  • Single machine cycle instructions
  • Reduced instruction set
  • Orthogonal (symmetric) instruction set

The traditional von-Neumman architecture uses the same bus to search the program memory for instructions and to access (write or read) data memory.

Figure 2 - Von-Neumman Architecture
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Figure 2 - Von-Neumman Architecture

The microcontroller architecture uses two separate address buses to access instructions and data.

Figure 3 - PIC microcontroller architecture
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Figure 3 - PIC microcontroller architecture

4. Format of instructions in the PIC microcontroller

The clock input (OSC1/CLKIN pin) is internally divided by four to generate four non-overlapping quadrature clocks named Q1, Q2, Q3, and Q4. Internally, the Program Counter (PC) is incremented at Q1 and the instruction is fetched from program memory and placed in the instruction register at Q4. It i s decoded and executed in the next cycle from Q1 to Q4.

Figure 4 - Microcontroller instruction cycle
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Figure 4 - Microcontroller instruction cycle

An instruction cycle consists of four Q-cycles (Q1, Q2, Q3, Q4). Instruction fetch and execution are done in-line, so that fetch takes one instruction cycle and execution takes another cycle. However, due to the "pipeline" characteristic, each instruction is actually executed in one cycle, because the execution of one instruction and the fetch of the next instruction occur simultaneously. If an instruction causes the Program Counter to change then two cycles are required to complete the instruction.

Figure 5 - Pipeline on the PIC microcontroller
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Figure 5 - Pipeline on the PIC microcontroller

The "pipeline" architecture overlaps fetch and execute, making instruction execution possible in a single machine cycle. Any bypass instruction (such as GOTO, CALL, or write to PC) takes two machine cycles.

The architecture with separate instruction and data buses allows different widths, so the instruction bus is optimized for a single word length. The number of instruction bus bits depends on how many instructions are implemented and the number of available registers in each microcontroller family.

5. Map of registers

All arithmetic and Boolean instructions are done through the working register W. The destination of the operation can be either the register W itself or one of the available registers in the microcontroller, depending solely on the instruction being executed.

Figure 6 - Map of registers
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Figure 6 - Map of registers

6. Interruptions

  • Multiple sources of internal/external interruptions
  • Interrupt priority set by software
  • Global and individual enablement of interruptions
  • Multiple interrupts wake the processor from sleep state (SLEEP)
  • Interrupt latency time is fixed at 3 instruction cycles

7. 16F84A Family

Besides the general characteristics of the PIC microcontroller architecture seen so far, there are other aspects peculiar to the members of each family. As the diversity of components is very large, we will look at the characteristics of the components of the 16F84A family.

7.1. PIC16F84A Family Hardware Architecture

The figure below shows in simplified form the internal architecture of the PICF84 family. It is register-based, with the data memory bus separated from the program memory bus (RISC architecture). This concept allows you to have a simple but extremely powerful instruction set that emphasizes bit, byte and register operations.

Figure 7 - Hardware architecture of the PIC18F8X family
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Figure 7 - Hardware architecture of the PIC18F8X family

7.2. Main family members

Introduction to the PIC microcontroller family
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Various operating and packaging frequencies are available. Depending on the application and production requirements there is a choice of device that is most appropriate to be selected. For more details please refer to the datasheet of the component you use.

7.3. General Features

  • Only 35 words of instruction to learn
  • All instructions with one cycle except for deviations that take two cycles
  • Operating speed: DC up to 20 Mhz clock
  • 14-bit wide instructions
  • 8-bit backplane
  • 16 special hardware function registers
  • Stack with 8 depth levels
  • Direct, indirect, and relative addressing modes for data and instructions.
  • Ability to interrupt

7.4. Peripheral Characteristics

  • 13 individually configured I/O pins
  • 8-bit Timer/Counter with 8 bits of "pre-scaling"
  • Power-On Reset (POR)
  • Watch-Dog Timer (WDT) with its own oscillator for safe operation
  • Programmable Code Protection
  • SLEEP mode for reduced power consumption.
  • Selectable oscillator options:
    • RC - low cost RC oscillator
    • XT-standardcrystal
    • HS-HighSpeedCrystal
    • LP - Low frequency crystal (reduced consumption)

  • In-circuit Serial Programming (via two pins)
  • 4 user-programmable identification bytes (ID)

7.5. Program Memory Organization

The PIC16F84A family has a 13-bit program counter (PC) capable of addressing up to 8K x 14 bits of program memory. The RESET vector is located at address 0000h and the interrupt vector at address 0004h. Another important feature to note is the impossibility to read directly from program memory. The way this is done in the PIC architecture is by using the "RETLW k" instruction, which will be seen later in the instruction set presentation.

7.6. Data Memory Organization

The data memory is made up of registers and general-purpose RAM. The registers are divided into 2 functional groups: Special Function Registers (32 starting addresses in each bank) and General Purpose Registers (remaining addresses in each bank). Among the special function registers are: the TMR0 register, the program counter (PC), the status register (STATUS), the I/O registers (ports) and the selection register (FSR). In addition, special function registers are used to control the configuration of the I/O ports and the pre-scalar options. The general-purpose registers are used for data and control information on command from the instructions.

7.7. Special Function Registers

Figure 8 - Special register map
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Figure 8 - Special register map

7.7.1.INDF : Indirect Data Addressing Register

The INDF register is not a physically allocated register and is used in conjunction with the FSR register to perform indirect addressing. Any instruction using the INDF register accesses data whose address is contained in the FSR register.

7.7.2. TMR0: Real Time Clock/Counter

The contents of this register are successively incremented using a clock, which can be either internal (derived from the microcontroller) and external (applied to the RA4/T0CKI pin). You can use an internal pre-division that allows you to extend (multiply) the count.

7.7.3. PC(PCL and PCLATH): Program Counter

The PC register is responsible for generating the instruction lookup address in program memory. It is normally incremented by one unit after the execution of an instruction, with the exception of instructions that used offsets such as GOTO and CALL. Since PC is 13 bits wide, the least significant byte comes from the PCL register, which is a write and read register, and the 5 most significant bits are stored in the PCLATH register.

Figure 9 - Program counter
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Figure 9 - Program counter

The PC has all bits reset during Reset. During program execution it is auto- incremented along with the execution of the instruction, unless the result of the instruction changes it. A routine in software with computed GOTO is accompanied by adding an offset to the program counter (ADDWF PCL).

7.7.4. STACK: Stack

The PIC 16F84A family implements an eight-level deep stack structure by 13 bits of the width. The stack area is not part of program memory or data memory and also cannot be read or written. Stacking is done when a subroutine is called using the CALL instruction. Unstacking is done using the RETLW instruction. Data cannot be stacked, a practice widely used in other microcontroller families that do not have RISC architecture.

7.7.5. STATUS

It is the register that holds the flags that indicate results of operations of the logic and arithmetic unit (ULA), the RESET condition, and the data memory bank preset bit.

The bits:
C,
D
Z (bits 0, 1 and 2)
bits indicate the state of an arithmetic operation in the ULA.

The bits:
P
D# (bit 3)
TO# (bit 4)
bits indicate the Reset status.

The bits:
TO#
PD#
are read-only, they cannot be changed by software. When presenting the Reset system and the Instruction Set we will look at this register in more detail.

7.7.6. OPTION

The OPTION register is 6 bits wide and contains several control bits for setting the prescale that will be used by TMR0 or WDT. It also sets the value of the prescale and the type of counting. After a Reset, all bits are set to "1".

7.7.7. Job Recorder

It is the most used register, because all data transfer is done through it. In addition, all arithmetic and Boolean operations use it as one of the operands. It is similar to the accumulator in other microcontroller families. This register is not addressable.

7.7.8. File Select Register

In the PIC 16F84X family Bits 0 to 6 select one of the 128 general-purpose registers available in indirect addressing mode. The map of general-purpose registers can be accessed either directly or indirectly through the selection register (FSR). An instruction using the INDF register will operate on the address that is contained in the selection register (FSR). This is indirect addressing.

For example:

  • Register 05 contains the value 10h
  • Register 06 contains the value 0Ah
  • Load the value 05 into the FSR register
  • A read to the INDF register will return the value 10h
  • Increments the FSR register value by one (FSR = 06)
  • A read to the INDF register will return the value 0Ah

7.7.9. I/O registers

The I/O registers can be written to or read from under program control like any other register. In the Reset condition all I/Os are set as input, as well as all I/O control registers (TRISA and TRIS) are set to 1.

7.7.10. DOOR

This register corresponds directly to the RA4:RA0 pins of the microcontroller. It has only 5 bits (RA0 to RA4); the other 3 bits are not implemented and are read as zero. Each bit of this PORT can be individually configured as input or output. The RA4/T0CK1 pin is a Schimitt Trigger input and an open drain output. Port RA4 is multiplexed with clock input T0Ck1. All other PORTA pins have Schimmit T r i g g e r input levels and full CMOS output drivers.

7.7.11 PORTB

This register has direct correspondence with pins RB7:RB0 of the microcontroller. It is 8 bits wide and bidirectional. Each bit of this PORT can be individually configured as input or output. Each PORTB pin has an internal pull-up.

An RBPU# control bit (OPTION <7>) can turn on pull-ups. The pull-up is automatically turned off when the pins are configured as outputs. Pull-ups are also disabled on Power-on Reset. Four pins of PORTB, RB7:RB4 have a state change interrupt feature. Only pins configured as input can cause this interrupt. The input pins (RB7:RB4) are compared with the old value stored in the latch, on the last read of PORTB.

7.7.12.TRISA and TRISB

These are the registers that refer to the configuration of the PORT and PORTB I/O pins. Writing 1's to the TRISA and TRISB registers make the bits inputs, putting the output driver into high impedance. Writing 0's to these registers makes the bits outputs, putting the output contents into the corresponding PORT latches. After a Reset, all registers are set to 1's, i.e. all I/O pins are set as input.

7.8. I/O Interface

All I/O pins can be used either as input or output. Their direction is defined by the TRISA and TRISB direction registers. Each bit in these registers corresponds to a n I/O pin that when set corresponds to input and when reset corresponds to output. For example, if we want to set PORTB with the least significant nibble as input and the most significant nibble as output, then the value to be written to TRISB will be 00001111 in binary, or "0F" in hexadecimal.

Note that the output data remains stored in a flip-flop regardless of whether the I/O pin is configured as input or output. This data stays in this condition until a new data is written. For the read process, the data has to be stabilized and the pin set to input because it is not stored in flip-flops.

Because of these characteristics, the programmer must be careful when using "read and write modified" instructions such as BSF or BCF, which read the I/OPORT, perform the operation on the bit, and write the result to the I/O PORT. For example, a BSF instruction on pin 5 of PORTB will cause the 8 I/O pins of PORTB to be read. Then, the CPU will perform the set bit 5 operation and the result will be written to PORTB. If another I/O pin is used as bidirectional, and at that instant it is set to input, the signal present will be read and rewritten over the data that was previously written to the output latch of the I/o pin. If the pin is set to input there will be no problem, but if it is set to output, the data in the output latch may be unknown. What the programmer should keep in mind is to never "short-circuit" the I/O pins . For example, if the I/O pin is connected to GND and the output latch is set to "1", with the I/O pin set to output, a high current will flow, which will damage the component.

7.9. Timer

The timer/counter module (TMR0) has the following features:

  • 8-bit timer/counter
  • You can use it for reading and writing
  • Software-programmable 8-bit preset
  • Internal or external clock selection
  • Edge type selection for external clock
  • FFH burst interruption to 00H


Timer mode is selected by making the T0CS bit = 0 (Timer 0 Chip Select - OPTION <5>). In timer mode, the register TMR0 will be incremented every machine cycle (without pre-scaling). If a write to TMR0 occurs, the increment will be inhibited for the next two machine cycles. The counter mode is selected by making the T0CS bit = 1. In this mode, TMR0 will be incremented on each rising or falling edge of the RA4/T0CK1 pin. The edge responsible for the increment is determined by the T0SE bit (Timer 0 Select Edge - OPTION <4>). The T0SE = 0 bit selects rising edge and T0SE selects falling edge.

The pre-scale is shared between the TMR0 module and Watch-Dog Time (WDT). The pre-scale is controlled in the software by the PSA control bit (PreScaler Assignmet - OPTION <3>). When the PSA= 1 bit, the pre-scale is under control of TMR0 and the WDT pre-scale is set to 1:1. The pre-scale is set by software via bits PS2:PS0 (OPTION <2:0>) with selection values that range from 1:2, 1:4, ..., 1:256. The use of pre-scaling can be for WDT or for TMR0, but never simultaneously.

Nothing prevents the pre-scale from being used in the first phase of the program for the WDT and in the second phase for the TMR0.

The WDT has its own oscillator capable of generating an 18ms period time without the pre-scale. With pre-scale of 1:128 the time rises to 2.5 seconds. Timer 0's interrupt is generated when the content of register TMR0 goes from FFH to 00H. This overflow causes T0IF =1. The interrupt can be masked by doing T0IE = 0 (Timer 0 Interrupt Enable - INTCO<5>). The T0IF bit must be reset by software in the interrupt service routine before re-enabling the interrupt. The Timer 0 interrupt cannot wake up the mod SLEEP processor because the timer is turned offbefore entering the sleep state.

7.10. Interruptions

The interrupts available in the PIC 16/17 families vary from component to component, depending on the hardware features implemented. The PIC 16/17 families have 3 interrupt sources implemented.

These are:

  • External Interruption RB0/INT
  • TMR0 Timer interrupt (overflow on countdown)
  • Interrupt by change on PortB(pins RB7:RB4)

The interrupt control register (INTCON) stores the individual interrupt requests in its bits. It also contains individual and global interrupt enable bits. The global interrupt enable bit, GIE (INTCON <7>) enables (if set) all unmasked interrupts or disables (if reset) all interrupts. Individual interrupts can be disabled via their corresponding enable bit in the INTCON register. The GIE bit is reset during Reset.

The "Return from Interrupt" instruction, RETFIE, exits the routine to disable future interrupts, the return address is placed on the stack, and the PC register is loaded with 0004H. Once in the interrupt service routine t h e source(s) of interrupts can be determined by testing the corresponding flags in the INTCON register. The interrupt serviced bit must be reset in software before rehabilitating interrupts to avoid recursive interrupts.

7.11. Software Instruction Sets

Figure 10 - PIC16F8X microcontroller instructions
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Figure 10 - PIC16F8X microcontroller instructions

8. Practice
8.1. Introduction

Microchip provides tools for developing applications for its PIC microcontrollers. Among these tools are MPLAB and PICStart. MPLAB is an IDE that provides integration between text editor, compilers and microcontrollers.

We can also use other development tools, on the Internet we can find several of them. In this experiment we will use the P16Pro Programmer for MicroChip microcontrollers tool, it provides besides software, a PIC microcontroller recorder (appendix 01). Using the P16pro software and the writing circuit, a program written in hexadecimal can be loaded into the microcontroller. Various parameters can be set in the software to program different versions of PIC microcontrollers. Please use the tool's manual for more details on the use of the software P16pro.

8.2. Generating a square wave in a PIC port

Let's program the PICF84A to generate a square wave. Open a text editor and write the code below, do not forget to respect the tabs before each command and its operands.

#include "p16f84.inc" 
LIST P=16F84

count equ 0x0C

;initialization
main program
INIBSF 03h,5;
MOVLW 00;
MOVWF 06;
BCF 03h,5;

LOOP BSF 06.0
CALL DELAY
BCF 06,0
CALL DELAY
GOTO LOOP

DELAY
MOVLW 9fh
MOVWF 1A
;MOVWF 1B

DELAYAUX
;DECFSZ 1B
;GOTO DELAYAUX

DECFSZ 1A
GOTO
DELAYAUX

RETLW 00

END

Next, transcribe the code into hexadecimal, to do this, submit the .ASM file you just created to the MPASM302.exe program. Now let's write the hexadecimal code into the PIC:

  • a. Connect the microcontroller recorder to the PC's parallel port.
  • b. Position the PIC in the recorder, check bevel position.
  • c. Turn on the recorder's source.
  • d. Open the P16pro program.
  • e. Select PIC16F84A: Device (F3).
  • f. Load the program written in the microcontroller's memory: Read (F6).
  • g. Erase the contents of the memory: Erase (F9).
  • h. Check if the memory is empty: Blank Check (F7).
  • i. Open the program written in hexadecimal: OpenProg (F1).
  • j. Select the XT oscillator: Fuses (F2).
  • k. Write the program written in hexadecimal in the microcontroller: Program (F4).
  • l. Check the recording and the oscillator option: Read (F6).
  • m. Turn off the recorder source.
  • n. Remove the PIC from the recorder, be careful with the pins.

To verify the operation of the program, we will implement a test circuit (figure 11). This circuit should connect the RB0 port of the microcontroller to a led. An oscillator should also be connected to the PIC, it will be the basis of its instruction cycles (see manual). The oscillator will be a crystal, with frequency and mounting configuration specified in the PICF84A manual [2].

Figure 11 - Test circuit
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Figure 11 - Test circuit
Introduction to the PIC microcontroller family
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9. Bibliography

  1. Microchip PIC16F8X Datasheet - www.microchip.com
  2. Hardware and Software Projects using PIC Microcontrollers - Edmur Canazian - 1999
  3. P16Pro Programmer for MicroChip microcontrollers - Short Manual
  4. The PIC Microcontroler Book

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