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Modify GP32's MMU tables and change caching settings
The following simple example shows how to modify GP32's MMU tables in order to change caching settings. This is especially useful if you want to move your frame buffers into "user RAM area" i.e. somewhere between 0x0C000000 and 0x0C79C000. The example uses BIOS call to do the job. Keep in mind that the granularity of MMU pages is 4KB, which means that the addresses you feed into the BIOS call must 4KB aligned addresses.
// C example and using SDK - libgpstdlib.a
//
void swi_mmu_change( void* start_addr, void* end_addr, ulong flags );
start_addr - a starting address of the memory region you
want these MMU changes to affect.
end_addr - an end address of the memory reqion you want
these MMU changes to affect.
flags - This value is ORed to the second level MMU page
table descriptor. Only the low 12 bits are used.
use:
0xFF2 - to disable cache and writeback
0xFFA - to enable cache and disable writeback
0xFFE - to enable cache and writeback
For example to turn on caching but disabling writeback from
0xc66A000 to 0xc700000 call BIOS function with the following
parameters:
swi_mmu_change( 0xC66A000, 0xC6FFFFF, 0xFFA );
@ ASM example and not using SDK
@
r0 = start_addr
r1 = end_addr
r2 = flags
BIOS call: SWI #0x02
For example to turn on caching but disabling writeback from
0xc66A000 to 0xc700000 call BIOS function with the following
parameters:
ldr r0,strt
ldr r1,end
ldr r2,flg
swi #0x02
...
strt: .word 0xC66A000
end: .word 0xC6FFFFF
flg: .word 0xFFASo when you are defining caching for your custom frame buffers make sure that the writeback is disabled. The BIOS disables caching and writeback for frame buffers but I have tested frame buffers with cache on and they seemed to work (no guarantees though). You can play safe and use 0xFF2.
