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Playstation 2 MEMORY & HARDWARE MAPPED REGISTERS LAYOUT
PS2 MEMORY & HARDWARE MAPPED REGISTERS LAYOUT, by Minmei (minemei2002@yahoo.com)
Please, feel free to distribute this document as well as make modifications or or corrections on it.
The purpose of this document is to through a little light to those unmmaped areas of PS2 that I've find very diffucult to find information about on the web.
I'm also very interested on learn more on how PS2 handle's its Interruptions and Exceptions hardware related flags (VSyncs, HSyncs, Counters, DMAs, etc...).
If you know how to complete or enhance this little document, please contact me (minemei2002@yahoo.com).
GENERAL MEMORY
--------------
0x00100000-0x01ffffff RAM Mirror Address. (cached)
0x20100000-0x21ffffff RAM Mirror Adress. (not cached)
0x30100000-0x31ffffff RAM Mirror Adress. (not cached & accelerated)
0x70000000-0x70003fff Scratch Pad RAM Adress.
0x1FC00000 - 0x1FFFFFFF ROM BIOS Mirror Adress. (not cached)
0x9FC00000 - 0x9FFFFFFF ROM BIOS Mirror Adress. (cached)
0xBFC00000 - 0xBFFFFFFF ROM BIOS Mirror Adress. (not cached)
0x80000000-0x9fffffff KSEG0.
0xA0000000-0xbfffffff KSEG1.
COUNTERS' REGISTERS
-------------------
10000000 T0_COUNT Timer Count
10000010 T0_MODE
Timer Mode
10000020 T0_COMP
Timer Compare value
10000030 T0_HOLD
Timer Pause
10000800 T1_COUNT Timer Count
10000810 T1_MODE Timer Mode
10000820 T1_COMP Timer Compare value
10000830 T1_HOLD Timer Pause
10001000 T2_COUNT Timer Count
10001010 T2_MODE Timer Mode
10001020 T2_COMP Timer Compare value
10001810 T3_COUNT Timer Count
10001820 T3_MODE Timer Mode
10001830 T3_COMP Timer Compare value
IPU REGISTERS (MPEG2 DECODER)
-----------------------------
10002000 IPU_CMD
10002010 IPU_CTRL
10002020 IPU_BP
10002030 IPU_TOP
GIF REGISTERS
-------------
10003000 GIF_CTRL
10003010 GIF_MODE
10003020 GIF_STAT
10003040 GIF_TAG0
10003050 GIF_TAG1
10003060 GIF_TAG2
10003070 GIF_TAG3
10003080 GIF_CNT
10003090 GIF_P3CNT
100030a0 GIF_P3TAG
VIF0 REGISTERS
--------------
10003800
VIF0_STAT
VIF0 Status
10003810
VIF0_FBRST
10003820
VIF0_ERR
10003830
VIF0_MARK
10003840
VIF0_CYCLE
10003850
VIF0_MODE
10003860
VIF0_NUM
10003870
VIF0_MASK
10003880
VIF0_CODE
10003890
VIF0_ITOPS
100038d0
VIF0_ITOP
10003900
VIF0_R0
10003910
VIF0_R1
10003920
VIF0_R2
10003930
VIF0_R3
10003940
VIF0_C0
10003950
VIF0_C1
10003960
VIF0_C2
10003970
VIF0_C3
VIF1 REGISTERS
--------------
10003c00 VIF1_STAT
10003c10
VIF1_FBRST
10003c20
VIF1_ERR
10003c30
VIF1_MARK
10003c40
VIF1_CYCLE
10003c50
VIF1_MODE
10003c60
VIF1_NUM
10003c70
VIF1_MASK
10003c80
VIF1_CODE
10003c90
VIF1_ITOPS
10003ca0
VIF1_BASE
10003cb0
VIF1_OFST
10003cc0
VIF1_TOPS
10003cd0
VIF1_ITOP
10003ce0
VIF1_TOP
10003d00
VIF1_R0
10003d10
VIF1_R1
10003d20
VIF1_R2
10003d30
VIF1_R3
10003d40
VIF1_C0
10003d50
VIF1_C1
10003d60
VIF1_C2
10003d70
VIF1_C3
FIFO
----
10004000 VIF0_FIFO(write)
10005000 VIF1_FIFO(read/write)
10006000 GIF_FIFO0
10006010 GIF_FIFO1
10006020 GIF_FIFO2
10007000
IPU_out_FIFO(read)
10007010 IPU_in_FIFO(write)
DMA CH0 REGISTERS (Linked to VIF0)
----------------------------------
10008000
D0_CHCR
DMA-0 Channel Control
10008010
D0_MADR
Memory Address
10008020
D0_SIZE
Transfer Size (they call it D0_QWC)
10008030
D0_TAG
DMA Tag (they call it D0_TADR)
10008040
D0_??LO
they call it D0_ASR0
10008050
D0_??HI
they call it D0_ASR1
DMA CH1 REGISTERS (Linked to VIF1)
----------------------------------
10009000
D1_CHCR
DMA-1 Channel Control
10009010
D1_MADR
Memory Address
10009020
D1_SIZE
Transfer Size (they call it D1_QWC)
10009030
D1_TAG
DMA Tag (they call it D1_TADR)
10009040
D1_??LO
they call it D1_ASR0
10009050
D1_??HI
they call it D1_ASR1
DMA CH2 REGISTERS (Linked to GIF)
---------------------------------
1000A000
D2_CHCR
DMA-2 Channel Control
1000A010
D2_MADR
Memory Address
1000A020
D2_SIZE
Transfer Size (they call it D2_QWC)
1000A030
D2_TAG
DMA Tag (they call it D2_TADR)
1000A040 D2_??LO
they call it D2_ASR0
1000A050 D2_??HI
they call it D2_ASR1
1000A080 D2_SADR
DMA CH3 REGISTERS (Linked to IPU (FROM???))
--------------------------------------------
1000B000
D3_CHCR
DMA-3 Channel Control
1000B010
D3_MADR
Memory Address
1000B020
D3_QWC
Transfer Size
DMA CH4 REGISTERS (Linked to IPU (TO???))
-----------------------------------------
1000B400
D4_CHCR
DMA-4 Channel Control
1000B410
D4_MADR
Memory Address
1000B420
D4_QWC
Transfer Size
1000B430
D4_TADR
DMA Tag
DMA CH5 REGISTERS (Linked to SIF0)
----------------------------------
1000C000
D5_CHCR
DMA-4 Channel Control
1000C010
D5_MADR
Memory Address
1000C020
D5_QWC
Transfer Size
DMA CH6 REGISTERS (Linked to SIF1)
----------------------------------
1000C400
D6_CHCR
DMA-6 Channel Control
1000C410
D6_MADR
Memory Address
1000C420
D6_QWC
Transfer Size
1000C430
D6_TADR
DMA Tag
DMA CH7 REGISTERS (Linked to SIF2)
----------------------------------
1000C800
D7_CHCR
DMA-7 Channel Control
1000C810
D7_MADR
Memory Address
1000C820
D7_QWC
Transfer Size
DMA CH8 REGISTERS (Linked to SPR (form SCRATCH PAD to RAM???)
--------------------------------------------------------------
1000D000
D8_CHCR
DMA-8 Channel Control
1000D010
D8_MADR
Memory Address
1000D020
D8_QWC
Transfer Size
1000D080
D8_MCR
???
DMA CH9 REGISTERS (Linked to SPR (form RAM to SCRATCH PAD???)
--------------------------------------------------------------
1000D400
D9_CHCR
DMA-9 Channel Control
1000D410
D9_MADR
Memory Address
1000D420
D9_QWC
Transfer Size
1000D430
D9_TADR
DMA Tag
1000D480
D9_MCR?
???
DMA CONTROL REGISTERS
---------------------
1000E000 D_CTRL DMA Control
1000E010
D_STAT
DMA Status
1000E020
D_PCR
1000E030 D_SQWC
1000E040 D_RBSR
1000E050 D_RBOR
1000E060 D_STADR
1000F000 INTC_STAT
1000F010 INTC_MASK
1000F100
1000F120
1000F130 STD-OUT STATUS???
1000F140
1000F150
1000F180 STD-OUT DATA???
1000F230 SBUS_SMFLG
1000F410
1000F430
1000F440
1000F480
1000F490
1000F500
1000f520 D_ENABLEW
1000f590 D_ENABLER
VU MAPPED MEMORY REGISTERS
--------------------------
11000000
VU0 PROGRAM MEMORY Program Memory (4K ROM)
11001000
VU0 MEMORY Memory (4K ROM)
11008000
VU1 PROGAM MEMORY VU1 Program Memory (16K ROM)
1100C000
VU1 MEMORY VU1 Memory (16K ROM)
GS
--
12000000 GS_PMODE
12000010
GS_SMODE1
12000020
GS_SMODE2
12000030
GS_SRFSH
12000040
GS_SYNCH1
12000050
GS_SYNCH2
12000060
GS_SYNCV
12000070
GS_DISPFB1
12000080
GS_DISPLAY1
12000090
GS_DISPFB2
//RESOLUTION
120000a0
GS_DISPLAY2
//
120000b0
GS_EXTBUF
120000c0
GS_EXTDATA
120000d0
GS_EXTWRITE
120000e0
GS_BGCOLOR
12001000 GS_CSR
12001010
GS_IMR
12001040 GS_BUSDIR
12001080 GS_SIGLBLID 
